

#include "dma.h"
#include "ringbuff.h"
#include "gd32f30x_rcu.h"
#include "uart_comm_ex_api.h"
#include "gpio.h"


uint32_t ADC0_Rslt_DMA[16] = {0};
uint32_t ADC1_Rslt_DMA[16] = {0};
uint32_t ADC2_Rslt_DMA[16] = {0};


char UART_recDatabuf[SCI_RECBUF_LEN]  = {0};
char UART_sendDatabuf[SCI_RECBUF_LEN] = {0};

char comm_sendDatabuf[COMM_BUFF_NUM] = {0};

char UART2_recDatabuf[SCI_RECBUF_LEN] = {0};
char UART2_sendDatabuf[SCI_RECBUF_LEN] = {0};

char UART1_recDatabuf[SCI_RECBUF_LEN] = {0};
char UART1_sendDatabuf[SCI_RECBUF_LEN] = {0};

char UART3_recDatabuf[SCI_RECBUF_LEN] = {0};
char UART3_sendDatabuf[SCI_RECBUF_LEN] = {0};

STR_RINGBUF userUARTRecbuf  = {"UART0DMARecive" , UART_recDatabuf , SCI_RECBUF_LEN, 0, 0, 0, 0};
STR_RINGBUF userUARTSendbuf = {"UART0DMASend"   , UART_sendDatabuf, SCI_RECBUF_LEN, 0, 0, 0, 0};

STR_RINGBUF commUARTSendbuf = {"UART0DMASend" , comm_sendDatabuf, COMM_BUFF_NUM, 0, 0, 0, 0};

STR_RINGBUF UART2Recbuf = {"UART2DMARecive" , UART2_recDatabuf , SCI_RECBUF_LEN, 0, 0, 0, 0};
STR_RINGBUF UART2Sendbuf = {"UART2DMASend"  , UART2_sendDatabuf, SCI_RECBUF_LEN, 0, 0, 0, 0};

STR_RINGBUF printfUARTRecbuf = {"UART3DMARecive" , UART3_recDatabuf , SCI_RECBUF_LEN, 0, 0, 0, 0};
STR_RINGBUF printfUARTSendbuf = {"UART3DMASend"  , UART3_sendDatabuf, SCI_RECBUF_LEN, 0, 0, 0, 0};

STR_RINGBUF UART1Recbuf = {"UART1DMARecive" , UART1_recDatabuf , SCI_RECBUF_LEN, 0, 0, 0, 0};
STR_RINGBUF UART1Sendbuf = {"UART1DMASend"  , UART1_sendDatabuf, SCI_RECBUF_LEN, 0, 0, 0, 0};

#if 0
char UART1_GS2X1_recDatabuf[SCI_RECBUF_LEN] = {0};
char UART1_GS2X1_sendDatabuf[SCI_RECBUF_LEN] = {0};

STR_RINGBUF GS2X1UARTRecbuf = {"UART1DMARecive" , UART1_GS2X1_recDatabuf , SCI_RECBUF_LEN, 0, 0, 0, 0};
STR_RINGBUF GS2X1UARTSendbuf = {"UART1DMASend"  , UART1_GS2X1_sendDatabuf, SCI_RECBUF_LEN, 0, 0, 0, 0};
#endif

// UART DAM send databuf, the length same with ringbuf
char UART1_DMA_sendbuf[SCI_RECBUF_LEN] = {0};
char UART2_DMA_sendbuf[SCI_RECBUF_LEN] = {0};

void dma0_CH0_init(void);
void dma0_CH3_init(void);
void dma0_CH4_init(void);
void dma1_CH4_init(void);
void dma0_CH1_init(void);
void dma0_CH2_init(void);
void dma0_CH5_init(void);
void dma0_CH6_init(void);
void dma1_CH2_init(void);

void dma1_CH0_init(void);
void dma1_CH1_init(void);


void uart_dma_sendMessg(STR_RINGBUF *bufhdl);

/*!
    \brief      dma0 initialize configure
    \param[in]  none
    \param[out] none
    \retval     none
*/
void dma0_1_init(void)
{
	// configure DMA clock
	rcu_periph_clock_enable(RCU_DMA0);
	
	rcu_periph_clock_enable(RCU_DMA1);

	dma0_CH0_init();    // ADC0 result
	
	dma0_CH3_init();    // UART0 send
 
	dma0_CH4_init();    // UART0 receive
	
	dma1_CH4_init();    // ADC2 result
	
	dma0_CH1_init();    // UART2 send
	
	dma0_CH2_init();    // UART2 receive
	
	dma0_CH5_init();    // UART1 receive
	
	dma0_CH6_init();    // UART1 send
	
	dma1_CH2_init();    // UART3 receive
	
	dma1_CH0_init();    // color LED1 ctrl
	
	dma1_CH1_init();    // color LED2 ctrl

	
}


/*!
    \brief      
    \param[in]  none
    \param[out] none
    \retval     none
*/

void dma1_CH0_init(void)
{
	dma_parameter_struct dma_init_struct;

	dma_deinit(DMA1, DMA_CH0);
	dma_struct_para_init(&dma_init_struct);

	dma_init_struct.direction     = DMA_MEMORY_TO_PERIPHERAL;
	dma_init_struct.memory_addr   = 0;
	dma_init_struct.memory_inc    = DMA_MEMORY_INCREASE_ENABLE;
	dma_init_struct.memory_width  = DMA_MEMORY_WIDTH_32BIT;
	dma_init_struct.number        = 0;
	dma_init_struct.periph_addr   = (uint32_t)(&TIMER_DMATB(TIMER7));
	dma_init_struct.periph_inc    = DMA_PERIPH_INCREASE_DISABLE;
	dma_init_struct.periph_width  = DMA_PERIPHERAL_WIDTH_32BIT;
	dma_init_struct.priority      = DMA_PRIORITY_MEDIUM;
	dma_init(DMA1, DMA_CH0, &dma_init_struct);

	// configure DMA mode 
	dma_circulation_disable(DMA1, DMA_CH0);
	dma_memory_to_memory_disable(DMA1, DMA_CH0);
	dma_channel_disable(DMA1, DMA_CH0);
	
    dma_circulation_disable(DMA1, DMA_CH0);                        
	dma_memory_to_memory_disable(DMA1, DMA_CH0);	     
		
	timer_primary_output_config(TIMER7, ENABLE);  
		
	timer_dma_transfer_config(TIMER7, TIMER_DMACFG_DMATA_CH2CV, TIMER_DMACFG_DMATC_1TRANSFER); 
    timer_dma_enable(TIMER7, TIMER_DMA_CH2D);
	timer_channel_dma_request_source_select(TIMER7, TIMER_DMAREQUEST_UPDATEEVENT);
    timer_auto_reload_shadow_disable(TIMER7);
		
	dma_channel_disable(DMA1, DMA_CH0);
    timer_enable(TIMER7);
		
	dma_interrupt_enable(DMA1,DMA_CH0,DMA_INT_FTF);  
    
    nvic_irq_enable(DMA1_Channel0_IRQn, 1, 1);
}



/*!
    \brief      
    \param[in]  none
    \param[out] none
    \retval     none
*/

void dma1_CH1_init(void)
{
		
	dma_parameter_struct dma_init_struct;

	dma_deinit(DMA1, DMA_CH1);
	dma_struct_para_init(&dma_init_struct);

	dma_init_struct.direction     = DMA_MEMORY_TO_PERIPHERAL;
	dma_init_struct.memory_addr   = 0;
	dma_init_struct.memory_inc    = DMA_MEMORY_INCREASE_ENABLE;
	dma_init_struct.memory_width  = DMA_MEMORY_WIDTH_32BIT;
	dma_init_struct.number        = 0;
	dma_init_struct.periph_addr   = (uint32_t)(&TIMER_DMATB(TIMER7));
	dma_init_struct.periph_inc    = DMA_PERIPH_INCREASE_DISABLE;
	dma_init_struct.periph_width  = DMA_PERIPHERAL_WIDTH_32BIT;
	dma_init_struct.priority      = DMA_PRIORITY_MEDIUM;
	dma_init(DMA1, DMA_CH1, &dma_init_struct);

	// configure DMA mode 
	dma_circulation_disable(DMA1, DMA_CH1);
	dma_memory_to_memory_disable(DMA1, DMA_CH1);
	dma_channel_disable(DMA1, DMA_CH1);
	
    dma_circulation_disable(DMA1, DMA_CH1);                        
	dma_memory_to_memory_disable(DMA1, DMA_CH1);	     
		
	timer_primary_output_config(TIMER7, ENABLE);  
		
	timer_dma_transfer_config(TIMER7, TIMER_DMACFG_DMATA_CH3CV, TIMER_DMACFG_DMATC_1TRANSFER); 
    timer_dma_enable(TIMER7, TIMER_DMA_CH3D);
	timer_channel_dma_request_source_select(TIMER7, TIMER_DMAREQUEST_UPDATEEVENT);
    timer_auto_reload_shadow_disable(TIMER7);
		
	dma_channel_disable(DMA1, DMA_CH1);
    timer_enable(TIMER7);
		
	dma_interrupt_enable(DMA1,DMA_CH1,DMA_INT_FTF);  
    
    nvic_irq_enable(DMA1_Channel1_IRQn, 1, 1);
	
}



















/*!
    \brief      dma0_CH3_init USART0 send
    \param[in]  none
    \param[out] none
    \retval     none
*/
void dma0_CH3_init(void)
{
	dma_parameter_struct dma_init_struct;

	// configure DMA register CH3
	dma_deinit(DMA0, DMA_CH3);
	dma_struct_para_init(&dma_init_struct);

	dma_init_struct.direction     = DMA_MEMORY_TO_PERIPHERAL;
	dma_init_struct.memory_addr   = 0;
	dma_init_struct.memory_inc    = DMA_MEMORY_INCREASE_ENABLE;
	dma_init_struct.memory_width  = DMA_MEMORY_WIDTH_8BIT;
	dma_init_struct.number        = 0;
	dma_init_struct.periph_addr   = ((uint32_t)&USART_DATA(USART0));
	dma_init_struct.periph_inc    = DMA_PERIPH_INCREASE_DISABLE;
	dma_init_struct.periph_width  = DMA_PERIPHERAL_WIDTH_8BIT;
	dma_init_struct.priority      = DMA_PRIORITY_MEDIUM;
	dma_init(DMA0, DMA_CH3, &dma_init_struct);

	// configure DMA mode 
	dma_circulation_disable(DMA0, DMA_CH3);
	dma_memory_to_memory_disable(DMA0, DMA_CH3);
	dma_channel_disable(DMA0, DMA_CH3);


}

/*!
    \brief      dma0_CH2_init USART2 send
    \param[in]  none
    \param[out] none
    \retval     none
*/
void dma0_CH1_init(void)
{
	dma_parameter_struct dma_init_struct;

	// configure DMA register CH1
	dma_deinit(DMA0, DMA_CH1);
	dma_struct_para_init(&dma_init_struct);

	dma_init_struct.direction     = DMA_MEMORY_TO_PERIPHERAL;
	dma_init_struct.memory_addr   = 0;
	dma_init_struct.memory_inc    = DMA_MEMORY_INCREASE_ENABLE;
	dma_init_struct.memory_width  = DMA_MEMORY_WIDTH_8BIT;
	dma_init_struct.number        = 0;
	dma_init_struct.periph_addr   = ((uint32_t)&USART_DATA(USART2));
	dma_init_struct.periph_inc    = DMA_PERIPH_INCREASE_DISABLE;
	dma_init_struct.periph_width  = DMA_PERIPHERAL_WIDTH_8BIT;
	dma_init_struct.priority      = DMA_PRIORITY_MEDIUM;
	dma_init(DMA0, DMA_CH1, &dma_init_struct);

	// configure DMA mode 
	dma_circulation_disable(DMA0, DMA_CH1);
	dma_memory_to_memory_disable(DMA0, DMA_CH1);
	dma_channel_disable(DMA0, DMA_CH1);
}


/*!
    \brief      dma0_CH6_init USART1 send
    \param[in]  none
    \param[out] none
    \retval     none
*/
void dma0_CH6_init(void)
{
	dma_parameter_struct dma_init_struct;

	// configure DMA register CH6
	dma_deinit(DMA0, DMA_CH6);
	dma_struct_para_init(&dma_init_struct);

	dma_init_struct.direction     = DMA_MEMORY_TO_PERIPHERAL;
	dma_init_struct.memory_addr   = 0;
	dma_init_struct.memory_inc    = DMA_MEMORY_INCREASE_ENABLE;
	dma_init_struct.memory_width  = DMA_MEMORY_WIDTH_8BIT;
	dma_init_struct.number        = 0;
	dma_init_struct.periph_addr   = ((uint32_t)&USART_DATA(USART1));
	dma_init_struct.periph_inc    = DMA_PERIPH_INCREASE_DISABLE;
	dma_init_struct.periph_width  = DMA_PERIPHERAL_WIDTH_8BIT;
	dma_init_struct.priority      = DMA_PRIORITY_MEDIUM;
	dma_init(DMA0, DMA_CH6, &dma_init_struct);

	// configure DMA mode 
	dma_circulation_disable(DMA0, DMA_CH6);
	dma_memory_to_memory_disable(DMA0, DMA_CH6);
	dma_channel_disable(DMA0, DMA_CH6);
}



/*!
    \brief      uart_dma_sendMessg
    \param[in]  none
    \param[out] none
    \retval     none
*/
void uart_dma_sendMessg(STR_RINGBUF *bufhdl)
{
	uint16_t send_data_len = 0;
	static char UART_DMA_sendbuf[COMM_BUFF_NUM] = {0};

	if((SET == dma_flag_get(DMA0, DMA_CH3, DMA_FLAG_FTF)) || 
						(0 == dma_transfer_number_get(DMA0, DMA_CH3)))
	{
		send_data_len = ringBufRead(bufhdl, UART_DMA_sendbuf, bufhdl->databufLen);

		if(send_data_len != 0 )
		{
			dma_channel_disable(DMA0, DMA_CH3);
			dma_flag_clear(DMA0, DMA_CH3, DMA_FLAG_FTF);
			dma_memory_address_config(DMA0, DMA_CH3, (uint32_t)UART_DMA_sendbuf);
			dma_transfer_number_config(DMA0, DMA_CH3, send_data_len);
			dma_channel_enable(DMA0, DMA_CH3);

			usart_dma_transmit_config(USART0, USART_DENT_ENABLE); 
		}
	}
}




/*!
    \brief      uart2_dma_sendMessg
    \param[in]  none
    \param[out] none
    \retval     none
*/
void uart2_dma_sendMessg(STR_RINGBUF *bufhdl)
{
	uint16_t send_data_len = 0;

	if((RESET == dma_flag_get(DMA0, DMA_CH1, DMA_FLAG_FTF)) || 
						(0 == dma_transfer_number_get(DMA0, DMA_CH1)))
	{
		send_data_len = ringBufRead(bufhdl, UART2_DMA_sendbuf, bufhdl->databufLen);

		if(send_data_len != 0 )
		{
			dma_channel_disable(DMA0, DMA_CH1);
			dma_flag_clear(DMA0, DMA_CH1, DMA_FLAG_FTF);
			dma_memory_address_config(DMA0, DMA_CH1, (uint32_t)UART2_DMA_sendbuf);
			dma_transfer_number_config(DMA0, DMA_CH1, send_data_len);
			dma_channel_enable(DMA0, DMA_CH1);

			usart_dma_transmit_config(USART2, USART_DENT_ENABLE); 
		}
	}
}


/*!
    \brief      uart1_dma_sendMessg
    \param[in]  none
    \param[out] none
    \retval     none
*/
void uart1_dma_sendMessg(STR_RINGBUF *bufhdl)
{
	uint16_t send_data_len = 0;

	if((RESET == dma_flag_get(DMA0, DMA_CH6, DMA_FLAG_FTF)) || 
						(0 == dma_transfer_number_get(DMA0, DMA_CH6)))
	{		
		send_data_len = ringBufRead(bufhdl, UART1_DMA_sendbuf, bufhdl->databufLen);

		if(send_data_len != 0 )
		{
			EN_RS485_UART1_TRAN();
			
			dma_channel_disable(DMA0, DMA_CH6);
			dma_flag_clear(DMA0, DMA_CH6, DMA_FLAG_FTF);
			dma_memory_address_config(DMA0, DMA_CH6, (uint32_t)UART1_DMA_sendbuf);
			dma_transfer_number_config(DMA0, DMA_CH6, send_data_len);
			
			dma_interrupt_enable(DMA0, DMA_CH6, DMA_INT_FTF);
			
			dma_channel_enable(DMA0, DMA_CH6);

			usart_dma_transmit_config(USART1, USART_DENT_ENABLE); 
		}
	}
}


/*!
    \brief      dma0_CH4_init UART0 revice
    \param[in]  none
    \param[out] none
    \retval     none
*/

void dma0_CH4_init(void)
{
	dma_parameter_struct dma_init_struct;

	// configure DMA register CH4
	dma_deinit(DMA0, DMA_CH4);
	dma_struct_para_init(&dma_init_struct);

	dma_init_struct.direction     = DMA_PERIPHERAL_TO_MEMORY;
	dma_init_struct.memory_addr   = (uint32_t)userUARTRecbuf.pdatabuf;
	dma_init_struct.memory_inc    = DMA_MEMORY_INCREASE_ENABLE;
	dma_init_struct.memory_width  = DMA_MEMORY_WIDTH_8BIT;
	dma_init_struct.number        = userUARTRecbuf.databufLen;
	dma_init_struct.periph_addr   = ((uint32_t)&USART_DATA(USART0));
	dma_init_struct.periph_inc    = DMA_PERIPH_INCREASE_DISABLE;
	dma_init_struct.periph_width  = DMA_PERIPHERAL_WIDTH_8BIT;
	dma_init_struct.priority      = DMA_PRIORITY_MEDIUM;
	dma_init(DMA0, DMA_CH4, &dma_init_struct);

	// configure DMA mode 
	dma_circulation_enable(DMA0, DMA_CH4);
	dma_memory_to_memory_disable(DMA0, DMA_CH4);
	dma_channel_enable(DMA0, DMA_CH4);

	// usart dma receive / send enable
	usart_dma_receive_config(USART0, USART_DENR_ENABLE);

}


/*!
    \brief      dma0_CH2_init UART2 revice
    \param[in]  none
    \param[out] none
    \retval     none
*/

void dma0_CH2_init(void)
{
	dma_parameter_struct dma_init_struct;

	// configure DMA register CH2
	dma_deinit(DMA0, DMA_CH2);
	dma_struct_para_init(&dma_init_struct);

	dma_init_struct.direction     = DMA_PERIPHERAL_TO_MEMORY;
	dma_init_struct.memory_addr   = (uint32_t)UART2Recbuf.pdatabuf;
	dma_init_struct.memory_inc    = DMA_MEMORY_INCREASE_ENABLE;
	dma_init_struct.memory_width  = DMA_MEMORY_WIDTH_8BIT;
	dma_init_struct.number        = UART2Recbuf.databufLen;
	dma_init_struct.periph_addr   = ((uint32_t)&USART_DATA(USART2));
	dma_init_struct.periph_inc    = DMA_PERIPH_INCREASE_DISABLE;
	dma_init_struct.periph_width  = DMA_PERIPHERAL_WIDTH_8BIT;
	dma_init_struct.priority      = DMA_PRIORITY_MEDIUM;
	dma_init(DMA0, DMA_CH2, &dma_init_struct);

	// configure DMA mode 
	dma_circulation_enable(DMA0, DMA_CH2);
	dma_memory_to_memory_disable(DMA0, DMA_CH2);
	dma_channel_enable(DMA0, DMA_CH2);

	// usart dma receive / send enable
	usart_dma_receive_config(USART2, USART_DENR_ENABLE);

}


/*!
    \brief      dma0_CH5_init UART1 revice
    \param[in]  none
    \param[out] none
    \retval     none
*/

void dma0_CH5_init(void)
{
	dma_parameter_struct dma_init_struct;

	// configure DMA register CH5
	dma_deinit(DMA0, DMA_CH5);
	dma_struct_para_init(&dma_init_struct);

	dma_init_struct.direction     = DMA_PERIPHERAL_TO_MEMORY;
	dma_init_struct.memory_addr   = (uint32_t)UART1Recbuf.pdatabuf;
	dma_init_struct.memory_inc    = DMA_MEMORY_INCREASE_ENABLE;
	dma_init_struct.memory_width  = DMA_MEMORY_WIDTH_8BIT;
	dma_init_struct.number        = UART1Recbuf.databufLen;
	dma_init_struct.periph_addr   = ((uint32_t)&USART_DATA(USART1));
	dma_init_struct.periph_inc    = DMA_PERIPH_INCREASE_DISABLE;
	dma_init_struct.periph_width  = DMA_PERIPHERAL_WIDTH_8BIT;
	dma_init_struct.priority      = DMA_PRIORITY_MEDIUM;
	dma_init(DMA0, DMA_CH5, &dma_init_struct);

	// configure DMA mode 
	dma_circulation_enable(DMA0, DMA_CH5);
	dma_memory_to_memory_disable(DMA0, DMA_CH5);
	dma_channel_enable(DMA0, DMA_CH5);

	// usart dma receive / send enable
	usart_dma_receive_config(USART1, USART_DENR_ENABLE);
	
}





/*!
    \brief      dma0_CH0_init ADC0 
    \param[in]  none
    \param[out] none
    \retval     none
*/

void dma0_CH0_init(void)
{
    /* ADC_DMA_channel configuration */
    dma_parameter_struct dma_data_parameter;
    
    /* ADC DMA_channel configuration */
    dma_deinit(DMA0, DMA_CH0);
    
    /* initialize DMA data mode */
    dma_data_parameter.periph_addr = (uint32_t)(&ADC_RDATA(ADC0));
    dma_data_parameter.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
    dma_data_parameter.memory_addr = (uint32_t)(&ADC0_Rslt_DMA);
    dma_data_parameter.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
    dma_data_parameter.periph_width = DMA_PERIPHERAL_WIDTH_32BIT;
    dma_data_parameter.memory_width = DMA_MEMORY_WIDTH_32BIT;  
    dma_data_parameter.direction = DMA_PERIPHERAL_TO_MEMORY;
    dma_data_parameter.number = 8;
    dma_data_parameter.priority = DMA_PRIORITY_HIGH;
    dma_init(DMA0, DMA_CH0, &dma_data_parameter);

    dma_circulation_enable(DMA0, DMA_CH0);
  
    /* enable DMA channel */
    dma_channel_enable(DMA0, DMA_CH0);
}

/*!
    \brief      dma1_CH4_init ADC2 
    \param[in]  none
    \param[out] none
    \retval     none
*/

void dma1_CH4_init(void)
{

    /* ADC_DMA_channel configuration */
    dma_parameter_struct dma_data_parameter;
    
    /* ADC DMA_channel configuration */
    dma_deinit(DMA1, DMA_CH4);
    
    /* initialize DMA data mode */
    dma_data_parameter.periph_addr = (uint32_t)(&ADC_RDATA(ADC2));
    dma_data_parameter.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
    dma_data_parameter.memory_addr = (uint32_t)(&ADC2_Rslt_DMA);
    dma_data_parameter.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
    dma_data_parameter.periph_width = DMA_PERIPHERAL_WIDTH_32BIT;
    dma_data_parameter.memory_width = DMA_MEMORY_WIDTH_32BIT;  
    dma_data_parameter.direction = DMA_PERIPHERAL_TO_MEMORY;
    dma_data_parameter.number = 5;
    dma_data_parameter.priority = DMA_PRIORITY_HIGH;
    dma_init(DMA1, DMA_CH4, &dma_data_parameter);

    dma_circulation_enable(DMA1, DMA_CH4);
  
    /* enable DMA channel */
    dma_channel_enable(DMA1, DMA_CH4);
}



/*!
    \brief      dma1_CH2_init UART3 receive
    \param[in]  none
    \param[out] none
    \retval     none
*/
/*!
    \brief      dma0_CH2_init UART2 revice
    \param[in]  none
    \param[out] none
    \retval     none
*/

void dma1_CH2_init(void)
{
	dma_parameter_struct dma_init_struct;

	// configure DMA register CH2
	dma_deinit(DMA1, DMA_CH2);
	dma_struct_para_init(&dma_init_struct);

	dma_init_struct.direction     = DMA_PERIPHERAL_TO_MEMORY;
	dma_init_struct.memory_addr   = (uint32_t)printfUARTRecbuf.pdatabuf;
	dma_init_struct.memory_inc    = DMA_MEMORY_INCREASE_ENABLE;
	dma_init_struct.memory_width  = DMA_MEMORY_WIDTH_8BIT;
	dma_init_struct.number        = printfUARTRecbuf.databufLen;
	dma_init_struct.periph_addr   = ((uint32_t)&USART_DATA(UART3));
	dma_init_struct.periph_inc    = DMA_PERIPH_INCREASE_DISABLE;
	dma_init_struct.periph_width  = DMA_PERIPHERAL_WIDTH_8BIT;
	dma_init_struct.priority      = DMA_PRIORITY_MEDIUM;
	dma_init(DMA1, DMA_CH2, &dma_init_struct);

	// configure DMA mode 
	dma_circulation_enable(DMA1, DMA_CH2);
	dma_memory_to_memory_disable(DMA1, DMA_CH2);
	dma_channel_enable(DMA1, DMA_CH2);

	// usart dma receive / send enable
	usart_dma_receive_config(UART3, USART_DENR_ENABLE);

}



/*!
    \brief      dma0_CH5_init UART1 revice
    \param[in]  none
    \param[out] none
    \retval     none
*/
void DMA0_Channel6_IRQHandler(void)
{
	if(dma_interrupt_flag_get(DMA0, DMA_CH6, DMA_INT_FTF) == SET)
	{
		usart_interrupt_enable(USART1, USART_INT_TC); 
		
		dma_interrupt_flag_clear(DMA0, DMA_CH6, DMA_INT_FTF);
	}
}


